ACA (Advanced Computer Architecture)

DCRUST SYLLABUS

CSE401C   ADVANCED COMPUTER ARCHITECTURE

CATEGORY : ENGINEERING SCIENCE COURSE

Course Objectives:

  1. To learn the concept of modern computers along-with performance analysis measures.
  2. To understand the architectures of various processor types of processors.
  3. To explore the paradigms of memory organization.
  4. To understand the concepts of parallelization techniques for processing of instructions.

Unit I

Introduction: Elements of modern computers (computing problems, algorithms, hardware, OS, system software); Evolution of computer architecture; Factors affecting system performance; architectural development tracks (Multiple-processor tracks, Multivector & SIMD tracks, Multithread & Dataflow tracks) Conditions of parallelism (Data dependence, Resource dependence, control dependence, Bernstein’s Conditions); Hardware & Software parallelism; Program partitioning & Scheduling; Program flow machines (Control flow, Data flow, Demand driven); Parallel processor applications; Speedup performance laws (Amdahl’s law, Gustafson’s law); Scalability (Goals, Metrics, evolution of scalable architectures, open issues)

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Unit II

Advanced processor Technology: Design space; Instruction pipelines; Instruction set architecture (RISC, CISC, RISC scalar processors, CISC scalar processors); Superscalar Processors, VLIW architecture; Vector & Symbolic processors; Pipelining: Linear pipeline processors, Nonlinear pipeline processors, Instruction pipeline(pipelined instruction processing, mechanisms for instruction pipelining, dynamic instruction scheduling, branch handling techniques) Parallel & Scalable Architectures: Hierarchical bus system,  Crossbar switch & multiport memory, multistage & combining networks; Cache coherence & synchronization mechanisms (cache coherence problem, Snoopy bus protocols, directory based protocols.

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Unit III

Advanced Memory Technology: Bus system (Backplane bus specification, addressing & timing protocols, Arbitration, Transaction and Interrupt, IEEE futurebus) Cache organizations (Cache addressing models, cache performance issues); Shared memory organizations (Interleaved memory organization, Bandwidth and fault tolerance, memory allocation schemes, Sequential & weak consistency models. Latency hiding techniques.

Unit IV

Parallel Models and Languages: Parallel Programming Models (Shared-Variable, Message passing, Data-Parallel, Object-Oriented); Parallel languages & Compilers (language features for parallelism, parallel language constructs, optimizing compilers for parallelism); Code optimization & partitioning (Scalar optimization, Local & Global optimization, Vectorization, code generation & scheduling, Trace scheduling compilation); Parallel programming environments (S/W Tools, Y-MP, Paragon, CM-5 Environments , Visualization & Performance tuning)

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TEXT /REFERENCE BOOKS:

  1.  Advance Computer Architecture:  Parallelism, Scalability, Programmability; 2nd Edition by Kai Hwang & Naresh Jotwani, 2012, TMH.
  2. Pipelined and Parallel processor design by Michael J. Fiynn – 1995, Narosa.

Course Outcomes:  After successful completion of the course students will learn the following:-

  1. Have an understanding of concept of modern computers along-with performance analysis measures.
  2. Have an ability to identify the architectures of various processor types of processors.
  3. Understand the paradigms of memory organization.
  4. Understand the concepts of simultaneous processing of instructions.
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